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VC0301L Datasheet
VC0301L USB PC Camera Processor
Datasheet
Version 1.0
2004-04-30
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Confidential
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Page 1 of 18
VC0301L Datasheet
Notices
No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Vimicro Corporation.
Manual Part Number
0301L-1010 Vimicro Corporation
Warranty
The material contained in this document is provided "as is," and is subject to change, without notice, in future editions. Further, to the maximum extent permitted by applicable law, Vimicro disclaims all warranties, either express or implied, with regard to this manual and any information contained herein, including but not limited to the implied warranties of merchantability and fitness for a particular purpose. Vimicro shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein. Should Vimicro and the user have a separate written agreement with warranty terms covering the material in this document that conflict with these terms, the warranty terms in the separate agreement shall control.
Preliminary - Subject to change without notice
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VC0301L Datasheet
Table of Contents
1. 2. 3. 4. 5. GENERAL DESCRIPTION.................................................................................................................................. 4 VC0301L SYSTEM BLOCK DIAGRAM ............................................................................................................ 5 VC0301L GENERAL FEATURES ....................................................................................................................... 6 VC0301L CHIP BLOCK DIAGRAM................................................................................................................... 7 PIN DEFINITION.................................................................................................................................................. 8 5.1 5.2 6. PIN ASSIGNMENT ...................................................................................................................................... 8 PIN DESCRIPTION...................................................................................................................................... 9
ELECTRICAL CHARACTERISTICS.............................................................................................................. 10 6.1 6.2 6.3 6.4 6.4.1 6.4.2 6.4.3 6.4.4 6.4.5 6.4.6 ABSOLUTE MAXIMUM RATINGS ............................................................................................................. 10 DC CHARACTERISTICS............................................................................................................................ 10 WORKING CURRENT ............................................................................................................................... 10 AC TIMING ............................................................................................................................................. 11 USB Transceiver AC Characteristics ..................................................................................................... 11 RESET Timing AC Characteristics......................................................................................................... 12 Clock AC Characteristics....................................................................................................................... 12 Input Signal AC Characteristics............................................................................................................. 13 Output Signal AC Characteristic............................................................................................................ 13 Serial Bus AC Timing ............................................................................................................................. 14
7.
VC0301L KEY FUNCTION BLOCKS .............................................................................................................. 15 7.1 7.2 7.3 7.4 7.5 7.6 IMAGE SENSOR INTERFACES ................................................................................................................... 15 USB FEATURES....................................................................................................................................... 15 IMAGE SIGNAL PROCESSING ................................................................................................................... 15 RASTER................................................................................................................................................... 15 COMPRESSION ENGINE ........................................................................................................................... 16 SYSTEM CONTROLLER ............................................................................................................................ 16
8. 9.
PACKAGE INFORMATION.............................................................................................................................. 17 CONTACT INFORMATION.............................................................................................................................. 18
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VC0301L Datasheet
1. General Description
The VC0301L chip provides a cost effective single chip solution for the PC camera application. It communicates with PC host via Universal Serial Bus (USB) port. All major image processing functions including image signal processing (ISP), image compression and data transfer units are built in the chip. VC0301L is designed as a cost-effective single-chip device replacing the complex and costly chip sets used in current PC camera designs with embedded USB device controller and transceiver, 48-LQFP package, and no external DRAM requirement. Advanced on-chip image signal processor and JPEG encoder produce images with superior quality.
Preliminary - Subject to change without notice
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VC0301L Datasheet
2. VC0301L System Block Diagram
Figure 2-1 shows the system block diagram of a typical PC camera phone. VC0301L is between the image sensor and the computer, enabling the computer to capture and display still images and video stream at real-time.
EEPROM
ESCK ESDA
VSYNC HSYNC
OSCIN OSCOUT CRYSTAL 48M Hz
DATA[8:0] PCLK ENB Serial Interface CMOS IMAGE SENSORS
VC0301L
USB CABLE
PC
Figure 2.1 USB PC Camera System Block Diagram
Preliminary - Subject to change without notice
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VC0301L Datasheet
3. VC0301L General Features
Low cost, single chip solution for high resolution USB PC camera applications Support up to 15 fps VGA video streaming USB Device Controller compliant with USB protocol 1.1 USB parameters configurable through EEPROM Support 10/9/8-bit RGB Bayer pattern raw data input from CMOS image sensors Support programmable color correction and gamma correction Support ISO/IEC 10918-1 (JPEG) standard image compression Support 4 quantization tables for programmable image quality Support raw data output for high quality still image 3.3V I/O, 1.8V core No external DRAM required Flexible system level solution support
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VC0301L Datasheet
4. VC0301L Chip Block Diagram
Figure 4-1 shows the block diagram of VC0301L. The ISP block receives RGB raw data from CMOS image sensor interface and performs various image processing tasks such as white balance, color correction, gamma correction, and edge enhancement. The Sub-sample & Raster block handles the input image data scaling and converts input image data to 8x8 block data format required by DCT module. The JPEG Encoder block compresses the image data from ISP block into JPEG format data. The compressed image data is then transferred to PC host via USB Device Controller (UDC) block for display.
EEPROM
CIS (CMOS Image Sensor)
EEPROM Interface UDC (USB Device Controller)
System Controller CIS Interface
PC HOST
Subsample & Raster
VC0301L
FIGURE 4.1 BLOCK DIAGRAM OF VC0301L
Preliminary - Subject to change without notice
JPEG Encoder
ISP
Page 7 of 18
VC0301L Datasheet
5. Pin Definition
5.1 Pin Assignment
CS_PWDB 38
CS_RSTB
CS_CLK
HSYNC
VSYNC
CS_EN
OVDD
48
47
46
45
44
43
42
41
40
39
CS_D[8] CS_D[7] CS_D[6] CS_D[5] NC NC CS_D[4] CS_D[3] CS_D[2] CS_D[1] CS_D[0] PWUP_RST
37
ESDA
OVSS
SDA
SCK
NC
1 2 3 4 5 6 7 8 9 10 11 12
36 35 34 33 32
PIO[3] ESCK PIO[2] PIO[1] PIO[0] TEST NC NC NC GND NC NC
VC0301L - 48
31 30 29 28 27 26 25
13
14
15
16
17
18
19
20
21
22
23 SNAPB
VSS_USB
NC
SUSPENDB
VDD_USB
CLKXIN
DVSS
DP
CLKXOUT
FIGURE 5.1 48-PIN LQFP PACKAGE
Preliminary - Subject to change without notice
DVDD
GND
DM
24
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VC0301L Datasheet
5.2
Pin Description
Pin
CS_D[8] CS_D[7] CS_D[6] CS_D[5] CS_D[4] CS_D[3] CS_D[2] CS_D[1] CS_D[0] PWUP_RST CLKXIN CLKXOUT DVSS VSS_USB DP DM VDD_USB SUSPENDB DVDD SNAPB GND GND TEST PIO[0] PIO[1] PIO[2] ESCK PIO[3] ESDA CS_PWDB VSYNC HSYNC OVSS CS_CLK OVDD SCK / SICLK SDA / SIVAL CS_ENB / SI_EN CS_RSTB / AECNT
Type
I, PD I, PD I, PD I, PD I, PD I, PD I, PD I, PD I, PD I, Schmitt I O P P I/O I/O P O P I, PU P P I, PD I/O, PD I/O, PD I/O, PD O I/O, PD I/O, Schmitt O I/O, PD I/O, PD P O P O, PD I/O, Schmitt O, PD O, PD
Function Sensor data Sensor data Sensor data Sensor data Sensor data Sensor data Sensor data Sensor data Sensor data Power on reset, active low Crystal input Crystal output Core ground USB transceiver ground USB data USB data USB transceiver power Active-low suspend Core power Snapshot and remote wake up, active low Ground Ground Manufacturing test mode General purpose I/O General purpose I/O General purpose I/O SEEPROM clock General purpose I/O EEPROM data Power-down pin controlling DC/DC regulator Vertical synchronous signal Horizontal synchronous signal I/O ground Sensor clock I/O power Serial interface clock Serial interface data Sensor power enable / Serial interface enable Sensor reset / auto exposure for TASC VGA sensor
48 Pin LQFP 1 2 3 4 7 8 9 10 11 12 13 14 15 16 17 18 19 21 22 23 24 27 31 32 33 34 35 36 37 38 39 40 41 42 43 45 46 47 48
TABLE 5.1 VC0301L PIN DESCRIPTIONS
Preliminary - Subject to change without notice
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VC0301L Datasheet
6. Electrical Characteristics
6.1 Absolute Maximum Ratings
Ambient temperature Storage temperature I/O pin voltage with respect to VSS 0 C to 70 C -40 C to 125 C -0.3V to VDD + 0.3V
TABLE 6.1 ABSOLUTE MAXIMUM RATINGS
6.2
DC Characteristics
Parameter 3.3V Power Supply 1.8V Power Supply Input Low voltage Input High voltage Output Low Voltage Output High Voltage Conditions Min 3.0 1.65 -0.5 2.3 2.4 Max 3.6 1.95 1.0 5.5 0.4 Unit V V V V V V
Symbol VDD3V VDD1V Vil Vih Vol Voh
TABLE 6.2 DC CHARACTERISTICS
6.3
Working Current
Current Mode style Normal Mode Suspend Mode 3.3V_IO (mA) 1.8V_Core (mA)
15 0.25
20 0.02
TABLE 6.3 WORKING CURRENT
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VC0301L Datasheet
6.4
AC Timing
6.4.1 USB Transceiver AC Characteristics
Symbol
TFR TFF TFRFF
Parameter
Rise time Fall time Rise and fall time matching
Conditions
CL=50p CL=50p TLRLF=TLR/TLF
Min
4 4 90
Typ
20 20 111.11
Max
Unit
ns ns %
TABLE 6.4 FULL-SPEED DRIVER ELECTRICAL CHARACTERISTICS
Symbol
TLR TLF TLRLF
Parameter
Rise time Fall time Rise and fall time matching
Conditions
CL=50p CL=600p CL=50p CL=600p TLRLF=TLR/TLF
Min
75
Typ
Max
300
Unit
ns ns %
75 300 80 125
TABLE 6.5 LOW-SPEED DRIVER ELECTRICAL CHARACTERISTICS
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VC0301L Datasheet
6.4.2 RESET Timing AC Characteristics
FIGURE 6.1 RESET TIMING AC CHARACTERISTICS DIAGRAM
Symbol Trst
Parameter Reset Pulse Width
Conditions
Min --
Max 20
Unit ms
TABLE 6.6 RESET SIGNAL AC CHARACTERISTICS
6.4.3 Clock AC Characteristics
FIGURE 6.2 CLOCK TIMING AC CHARACTERISTICS DIAGRAM
Symbol
1/Tcyc Thigh Tlow
Parameter
Oscillator Frequency Oscillator Clock High Time Oscillator Clock Low Time
Conditions
48@10PPM
Min
8.3 8.3
Max
-
Unit
MHz ns ns
TABLE 6.7 CLOCK SIGNAL AC CHARACTERISTICS
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Page 12 of 18
VC0301L Datasheet
6.4.4 Input Signal AC Characteristics
CS_CLK Tsu CS_D Th Valid data
CS_CLK VSYNC/HSYNC
Tsu
Th
FIGURE 6.3 INPUT SIGNAL AC CHARACTERISTICS Symbol Parameter Input setup time Tsu Input hold time Th TABLE 6.8 CS_D INPUT SIGNAL AC CHARACTERISTICS Symbol parameter Input setup time Tsu Input hold time Th TABLE 6.9 VSYNC / HSYNC INPUT AC CHARACTERISTICS 0 ns conditions Min Max 20 Unit ns 0 ns Conditions Min Max 45 Unit ns
6.4.5 Output Signal AC Characteristic
CS_CLK VSYNC/HSYNC Td
FIGURE 6.4 VSYNC/HSYNC OUTPUT AC CHARACTERISTICS
Symbol Td
Parameter Output delay
Conditions
Min -
Max 1.5
Unit ns
TABLE 6.10 VSYNC/HSYNC OUTPUT AC CHARACTERISTICS
Preliminary - Subject to change without notice
Page 13 of 18
VC0301L Datasheet
6.4.6 Serial Bus AC Timing
FIGURE 6.5 SERIAL BUS TIMING DIAGRAM
Parameter SCK clock frequency Time that serial bus must be free before a new transmission can start Hold time for a START LOW period of SCK HIGH period of SCK Setup time for START Data hold time Data setup time Rise time of both SDA and SCK Fall time of both SDA and SCK Setup time for STOP Capacitive load of each bus lines (SDA, SCK)
Symbol fsck tbuf thd;Sta tlow thigh tsu;Sta thd;dat tsu;dat tr tf tsu;Stp Cb
Min 0 4.7 4.0 4.7 4.0 4.7 0 200 4.7 -
Max. 100 1 300 -
Unit KHz us us us us us us ns us ns us pf
TABLE 6.11 Serial Bus Timing Table
Preliminary - Subject to change without notice
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VC0301L Datasheet
7. VC0301L Key Function Blocks
7.1 Image Sensor Interfaces
Support off-the-shelf CMOS image sensors 10/9/8-bit RGB raw data input
7.2
USB Features
Built-in USB transceiver Suspend and Remote wakeup When audio function is enabled, interface 0 is for video transfer, interface 1 and 2 are for audio control and audio transfer. When audio function is disabled, interface 0 is for video transfer. Programmable OEM USB parameters by EEPROM including: vendor ID, product ID, MaxPower, serial number, manufacturer descriptor, and product descriptor and chip revision.
7.3
Image Signal Processing
Hardware Dead Pixel Compensation 2-wire/3-wire serial bus interface to CMOS image sensor Programmable white balance, color correction and gamma correction Automatic Exposure (AE), Automatic White Balance (AWB), Automatic Gain Control (AGC) Programmable AE/AWB windows Edge enhancement and noise removal 2x Sub-Sampling
7.4
Raster
The output data format is 4:2:2 YCbCr Change the input image data to 8x8 block data format required by the DCT
Preliminary - Subject to change without notice
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VC0301L Datasheet
7.5
Compression Engine
Standard JPEG compression engine comply to ISO/IEC 10918-1 specifications 2 AC and 2 DC Huffman code table 4 quantization tables for flexible image quality control Bit Rate Control (BRC) engine Programmable simplified JPEG header for better performance VGA @ 15fps, CIF/SIF up to 30 fps Adjustable frame rate for efficient bandwidth usage
7.6
System Controller
Control ISP, JPEG, and USB blocks, and configure related control registers Generate chip clock Error detection and handling through USB interface
Preliminary - Subject to change without notice
Page 16 of 18
VC0301L Datasheet
8. Package Information
Lead Count Body Size Stand-Off Body Thickness Lead Width Lead Thickness Lead Pitch D1 E1 A1 A2 b c e
48
7 7 0.1 1.4 0.2 0.127 0.5
TABLE 8.1 VC0301L PACKAGE DIMENSION (UNIT: MM)
Preliminary - Subject to change without notice
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VC0301L Datasheet
9. Contact Information
Vimicro Corporation, USA
1758 N. Shoreline Blvd Mountain View, CA 94043 USA Tel: 1-650-966-1882 Fax: 1-650-966-1885
Vimicro Corporation, Beijing
15/F Shining Tower No.35 Xueyuan Road Haidian District, Beijing 100083 P. R. China Tel: 86-10-68948888 Fax: 86-10-68944075 http://www.vimicro.com
Preliminary - Subject to change without notice
Page 18 of 18


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